
T-exmaple:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004006c0 <_init>:
  4006c0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4006c4:	910003fd 	mov	x29, sp
  4006c8:	9400003c 	bl	4007b8 <call_weak_fn>
  4006cc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4006d0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004006e0 <.plt>:
  4006e0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4006e4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf3a8>
  4006e8:	f947fe11 	ldr	x17, [x16, #4088]
  4006ec:	913fe210 	add	x16, x16, #0xff8
  4006f0:	d61f0220 	br	x17
  4006f4:	d503201f 	nop
  4006f8:	d503201f 	nop
  4006fc:	d503201f 	nop

0000000000400700 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@plt>:
  400700:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400704:	f9400211 	ldr	x17, [x16]
  400708:	91000210 	add	x16, x16, #0x0
  40070c:	d61f0220 	br	x17

0000000000400710 <__libc_start_main@plt>:
  400710:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400714:	f9400611 	ldr	x17, [x16, #8]
  400718:	91002210 	add	x16, x16, #0x8
  40071c:	d61f0220 	br	x17

0000000000400720 <_ZdlPvm@plt>:
  400720:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400724:	f9400a11 	ldr	x17, [x16, #16]
  400728:	91004210 	add	x16, x16, #0x10
  40072c:	d61f0220 	br	x17

0000000000400730 <__cxa_atexit@plt>:
  400730:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400734:	f9400e11 	ldr	x17, [x16, #24]
  400738:	91006210 	add	x16, x16, #0x18
  40073c:	d61f0220 	br	x17

0000000000400740 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1Ev@plt>:
  400740:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400744:	f9401211 	ldr	x17, [x16, #32]
  400748:	91008210 	add	x16, x16, #0x20
  40074c:	d61f0220 	br	x17

0000000000400750 <abort@plt>:
  400750:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400754:	f9401611 	ldr	x17, [x16, #40]
  400758:	9100a210 	add	x16, x16, #0x28
  40075c:	d61f0220 	br	x17

0000000000400760 <__gmon_start__@plt>:
  400760:	b0000090 	adrp	x16, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400764:	f9401a11 	ldr	x17, [x16, #48]
  400768:	9100c210 	add	x16, x16, #0x30
  40076c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400770 <_start>:
  400770:	d280001d 	mov	x29, #0x0                   	// #0
  400774:	d280001e 	mov	x30, #0x0                   	// #0
  400778:	aa0003e5 	mov	x5, x0
  40077c:	f94003e1 	ldr	x1, [sp]
  400780:	910023e2 	add	x2, sp, #0x8
  400784:	910003e6 	mov	x6, sp
  400788:	580000c0 	ldr	x0, 4007a0 <_start+0x30>
  40078c:	580000e3 	ldr	x3, 4007a8 <_start+0x38>
  400790:	58000104 	ldr	x4, 4007b0 <_start+0x40>
  400794:	97ffffdf 	bl	400710 <__libc_start_main@plt>
  400798:	97ffffee 	bl	400750 <abort@plt>
  40079c:	00000000 	.inst	0x00000000 ; undefined
  4007a0:	00400884 	.word	0x00400884
  4007a4:	00000000 	.word	0x00000000
  4007a8:	004009e8 	.word	0x004009e8
  4007ac:	00000000 	.word	0x00000000
  4007b0:	00400a68 	.word	0x00400a68
  4007b4:	00000000 	.word	0x00000000

00000000004007b8 <call_weak_fn>:
  4007b8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf3a8>
  4007bc:	f947f000 	ldr	x0, [x0, #4064]
  4007c0:	b4000040 	cbz	x0, 4007c8 <call_weak_fn+0x10>
  4007c4:	17ffffe7 	b	400760 <__gmon_start__@plt>
  4007c8:	d65f03c0 	ret
  4007cc:	00000000 	.inst	0x00000000 ; undefined

00000000004007d0 <deregister_tm_clones>:
  4007d0:	b0000080 	adrp	x0, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  4007d4:	91016000 	add	x0, x0, #0x58
  4007d8:	b0000081 	adrp	x1, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  4007dc:	91016021 	add	x1, x1, #0x58
  4007e0:	eb00003f 	cmp	x1, x0
  4007e4:	540000a0 	b.eq	4007f8 <deregister_tm_clones+0x28>  // b.none
  4007e8:	90000001 	adrp	x1, 400000 <_init-0x6c0>
  4007ec:	f9454421 	ldr	x1, [x1, #2696]
  4007f0:	b4000041 	cbz	x1, 4007f8 <deregister_tm_clones+0x28>
  4007f4:	d61f0020 	br	x1
  4007f8:	d65f03c0 	ret
  4007fc:	d503201f 	nop

0000000000400800 <register_tm_clones>:
  400800:	b0000080 	adrp	x0, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400804:	91016000 	add	x0, x0, #0x58
  400808:	b0000081 	adrp	x1, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  40080c:	91016021 	add	x1, x1, #0x58
  400810:	cb000021 	sub	x1, x1, x0
  400814:	9343fc21 	asr	x1, x1, #3
  400818:	8b41fc21 	add	x1, x1, x1, lsr #63
  40081c:	9341fc21 	asr	x1, x1, #1
  400820:	b40000a1 	cbz	x1, 400834 <register_tm_clones+0x34>
  400824:	90000002 	adrp	x2, 400000 <_init-0x6c0>
  400828:	f9454842 	ldr	x2, [x2, #2704]
  40082c:	b4000042 	cbz	x2, 400834 <register_tm_clones+0x34>
  400830:	d61f0040 	br	x2
  400834:	d65f03c0 	ret

0000000000400838 <__do_global_dtors_aux>:
  400838:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40083c:	910003fd 	mov	x29, sp
  400840:	f9000bf3 	str	x19, [sp, #16]
  400844:	b0000093 	adrp	x19, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400848:	39416260 	ldrb	w0, [x19, #88]
  40084c:	35000080 	cbnz	w0, 40085c <__do_global_dtors_aux+0x24>
  400850:	97ffffe0 	bl	4007d0 <deregister_tm_clones>
  400854:	52800020 	mov	w0, #0x1                   	// #1
  400858:	39016260 	strb	w0, [x19, #88]
  40085c:	f9400bf3 	ldr	x19, [sp, #16]
  400860:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400864:	d65f03c0 	ret

0000000000400868 <frame_dummy>:
  400868:	17ffffe6 	b	400800 <register_tm_clones>

000000000040086c <_Z7exampleii>:
  40086c:	d10043ff 	sub	sp, sp, #0x10
  400870:	b9000fe0 	str	w0, [sp, #12]
  400874:	b9000be1 	str	w1, [sp, #8]
  400878:	d503201f 	nop
  40087c:	910043ff 	add	sp, sp, #0x10
  400880:	d65f03c0 	ret

0000000000400884 <main>:
  400884:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400888:	910003fd 	mov	x29, sp
  40088c:	910083a0 	add	x0, x29, #0x20
  400890:	9400004c 	bl	4009c0 <_Z1gI9ContainerIiEEvRKT_>
  400894:	90000000 	adrp	x0, 400000 <_init-0x6c0>
  400898:	912ac000 	add	x0, x0, #0xab0
  40089c:	f9000fa0 	str	x0, [x29, #24]
  4008a0:	910063a1 	add	x1, x29, #0x18
  4008a4:	9100a3a0 	add	x0, x29, #0x28
  4008a8:	9400003c 	bl	400998 <_ZN1SC1ERKS_>
  4008ac:	9100a3a0 	add	x0, x29, #0x28
  4008b0:	94000049 	bl	4009d4 <_Z10fpoly_onlyI1SvEiT_>
  4008b4:	9100a3a0 	add	x0, x29, #0x28
  4008b8:	94000025 	bl	40094c <_ZN1SD1Ev>
  4008bc:	910063a0 	add	x0, x29, #0x18
  4008c0:	94000023 	bl	40094c <_ZN1SD1Ev>
  4008c4:	52800000 	mov	w0, #0x0                   	// #0
  4008c8:	a8c37bfd 	ldp	x29, x30, [sp], #48
  4008cc:	d65f03c0 	ret

00000000004008d0 <_Z41__static_initialization_and_destruction_0ii>:
  4008d0:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4008d4:	910003fd 	mov	x29, sp
  4008d8:	b9001fa0 	str	w0, [x29, #28]
  4008dc:	b9001ba1 	str	w1, [x29, #24]
  4008e0:	b9401fa0 	ldr	w0, [x29, #28]
  4008e4:	7100041f 	cmp	w0, #0x1
  4008e8:	540001e1 	b.ne	400924 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  4008ec:	b9401ba1 	ldr	w1, [x29, #24]
  4008f0:	529fffe0 	mov	w0, #0xffff                	// #65535
  4008f4:	6b00003f 	cmp	w1, w0
  4008f8:	54000161 	b.ne	400924 <_Z41__static_initialization_and_destruction_0ii+0x54>  // b.any
  4008fc:	b0000080 	adrp	x0, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400900:	9101a000 	add	x0, x0, #0x68
  400904:	97ffff8f 	bl	400740 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEC1Ev@plt>
  400908:	b0000080 	adrp	x0, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  40090c:	91010002 	add	x2, x0, #0x40
  400910:	b0000080 	adrp	x0, 411000 <_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev@GLIBCXX_3.4.21>
  400914:	9101a001 	add	x1, x0, #0x68
  400918:	90000000 	adrp	x0, 400000 <_init-0x6c0>
  40091c:	911c0000 	add	x0, x0, #0x700
  400920:	97ffff84 	bl	400730 <__cxa_atexit@plt>
  400924:	d503201f 	nop
  400928:	a8c27bfd 	ldp	x29, x30, [sp], #32
  40092c:	d65f03c0 	ret

0000000000400930 <_GLOBAL__sub_I_fl>:
  400930:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400934:	910003fd 	mov	x29, sp
  400938:	529fffe1 	mov	w1, #0xffff                	// #65535
  40093c:	52800020 	mov	w0, #0x1                   	// #1
  400940:	97ffffe4 	bl	4008d0 <_Z41__static_initialization_and_destruction_0ii>
  400944:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400948:	d65f03c0 	ret

000000000040094c <_ZN1SD1Ev>:
  40094c:	d10043ff 	sub	sp, sp, #0x10
  400950:	f90007e0 	str	x0, [sp, #8]
  400954:	90000000 	adrp	x0, 400000 <_init-0x6c0>
  400958:	912ac001 	add	x1, x0, #0xab0
  40095c:	f94007e0 	ldr	x0, [sp, #8]
  400960:	f9000001 	str	x1, [x0]
  400964:	d503201f 	nop
  400968:	910043ff 	add	sp, sp, #0x10
  40096c:	d65f03c0 	ret

0000000000400970 <_ZN1SD0Ev>:
  400970:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400974:	910003fd 	mov	x29, sp
  400978:	f9000fa0 	str	x0, [x29, #24]
  40097c:	f9400fa0 	ldr	x0, [x29, #24]
  400980:	97fffff3 	bl	40094c <_ZN1SD1Ev>
  400984:	d2800101 	mov	x1, #0x8                   	// #8
  400988:	f9400fa0 	ldr	x0, [x29, #24]
  40098c:	97ffff65 	bl	400720 <_ZdlPvm@plt>
  400990:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400994:	d65f03c0 	ret

0000000000400998 <_ZN1SC1ERKS_>:
  400998:	d10043ff 	sub	sp, sp, #0x10
  40099c:	f90007e0 	str	x0, [sp, #8]
  4009a0:	f90003e1 	str	x1, [sp]
  4009a4:	90000000 	adrp	x0, 400000 <_init-0x6c0>
  4009a8:	912ac001 	add	x1, x0, #0xab0
  4009ac:	f94007e0 	ldr	x0, [sp, #8]
  4009b0:	f9000001 	str	x1, [x0]
  4009b4:	d503201f 	nop
  4009b8:	910043ff 	add	sp, sp, #0x10
  4009bc:	d65f03c0 	ret

00000000004009c0 <_Z1gI9ContainerIiEEvRKT_>:
  4009c0:	d10043ff 	sub	sp, sp, #0x10
  4009c4:	f90007e0 	str	x0, [sp, #8]
  4009c8:	d503201f 	nop
  4009cc:	910043ff 	add	sp, sp, #0x10
  4009d0:	d65f03c0 	ret

00000000004009d4 <_Z10fpoly_onlyI1SvEiT_>:
  4009d4:	d10043ff 	sub	sp, sp, #0x10
  4009d8:	f90007e0 	str	x0, [sp, #8]
  4009dc:	52800020 	mov	w0, #0x1                   	// #1
  4009e0:	910043ff 	add	sp, sp, #0x10
  4009e4:	d65f03c0 	ret

00000000004009e8 <__libc_csu_init>:
  4009e8:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009ec:	910003fd 	mov	x29, sp
  4009f0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009f4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf3a8>
  4009f8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf3a8>
  4009fc:	91356294 	add	x20, x20, #0xd58
  400a00:	913522b5 	add	x21, x21, #0xd48
  400a04:	a902dff6 	stp	x22, x23, [sp, #40]
  400a08:	cb150294 	sub	x20, x20, x21
  400a0c:	f9001ff8 	str	x24, [sp, #56]
  400a10:	2a0003f6 	mov	w22, w0
  400a14:	aa0103f7 	mov	x23, x1
  400a18:	9343fe94 	asr	x20, x20, #3
  400a1c:	aa0203f8 	mov	x24, x2
  400a20:	97ffff28 	bl	4006c0 <_init>
  400a24:	b4000194 	cbz	x20, 400a54 <__libc_csu_init+0x6c>
  400a28:	f9000bb3 	str	x19, [x29, #16]
  400a2c:	d2800013 	mov	x19, #0x0                   	// #0
  400a30:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a34:	aa1803e2 	mov	x2, x24
  400a38:	aa1703e1 	mov	x1, x23
  400a3c:	2a1603e0 	mov	w0, w22
  400a40:	91000673 	add	x19, x19, #0x1
  400a44:	d63f0060 	blr	x3
  400a48:	eb13029f 	cmp	x20, x19
  400a4c:	54ffff21 	b.ne	400a30 <__libc_csu_init+0x48>  // b.any
  400a50:	f9400bb3 	ldr	x19, [x29, #16]
  400a54:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a58:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a5c:	f9401ff8 	ldr	x24, [sp, #56]
  400a60:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a64:	d65f03c0 	ret

0000000000400a68 <__libc_csu_fini>:
  400a68:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a6c <_fini>:
  400a6c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a70:	910003fd 	mov	x29, sp
  400a74:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a78:	d65f03c0 	ret
